1. Field of the Invention
The present invention is directed to integrated circuit design software used in the manufacture of integrated circuits. More specifically, but without limitation thereto, the present invention is directed to generating hardware description language (HDL) code for a phase locked loop in an integrated circuit design.
2. Description of the Prior Art
Phase locked loop circuits are extremely important analog components in an application-specific integrated circuit (ASIC) cell library. Previous methods for representing such components in a digital integrated circuit environment generally require a set of complex hardware description language (HDL) models for each integrated circuit technology.